A differential line driver circuit typically receives relatively weak differential input signals and provides differential output signals for driving highly resistive and sometimes highly capacitive loads. Differential line driver circuits are typically used in communications devices to drive transmission lines or telephone cables. Ideally, a differential line driver circuit should provide highly linear operation with low power consumption.
FIG. 1 illustrates in partial schematic diagram form and partial block diagram form, prior art differential line driver circuit 10. Differential line driver circuit 10 includes an input stage comprising differential amplifier 12, a second stage comprising single-ended amplifiers 13-16, and an output stage comprising P-channel transistors 17 and 19 and N-channel transistors 18 and 20. Differential amplifier 12 receives differential input signals, and in response, provides differential output signals to single-ended amplifiers 13-16. The output stage has two portions, each portion comprising a P-channel transistor and an N-channel transistor connected in series between a positive power supply terminal (V.sub.DD) and a negative power supply terminal (V.sub.SS).
Input differential amplifier 12 provides a substantial amount of the voltage gain for line driver circuit 10. Single-ended amplifiers 13-16 of the second stage provide level shifting to the output stage and may provide some additional gain. To minimize power consumption, it is desirable to operate single-ended amplifiers 13-16 as class A amplifiers. The function of the output stages is to provide a large current gain for driving a resistive load of between 50 and 100 ohms. Clamping circuits (not shown in FIG. 1) may be used at the gates of the transistors of the output stages to provide a minimum bias current to the transistors of the output stages. The minimum bias current ensures that the output stages Operate in class AB, and improves crossover distortion. Such clamping circuits are well known, and an example clamping circuit is disclosed in U.S. Pat. No. 5,083,051, Whatley et al., "Output Driver Circuit With Improved Output Stage Biasing". In prior art line driver circuit 10 of FIG. 1, if clamping circuits are used on the gates of the output transistors, much of the power consumption occurs as a result of the bias currents of single-ended amplifiers 13-16.